From fdcd650598dbf1481eb725b8cab31e58bc3bb896 Mon Sep 17 00:00:00 2001 From: Ian Moffett Date: Tue, 23 Dec 2025 18:52:47 -0500 Subject: mos/x86_64: cpu: Add initial trap handling stubs Signed-off-by: Ian Moffett --- mos/sys/arch/x86_64/cpu/trap.c | 16 +++ mos/sys/arch/x86_64/cpu/vector.S | 214 +++++++++++++++++++++++++++++++++++++++ mos/sys/inc/arch/x86_64/frame.h | 40 ++++++++ mos/sys/inc/arch/x86_64/kfence.h | 31 ++++++ 4 files changed, 301 insertions(+) create mode 100644 mos/sys/arch/x86_64/cpu/trap.c create mode 100644 mos/sys/arch/x86_64/cpu/vector.S create mode 100644 mos/sys/inc/arch/x86_64/frame.h create mode 100644 mos/sys/inc/arch/x86_64/kfence.h diff --git a/mos/sys/arch/x86_64/cpu/trap.c b/mos/sys/arch/x86_64/cpu/trap.c new file mode 100644 index 0000000..bacf9c2 --- /dev/null +++ b/mos/sys/arch/x86_64/cpu/trap.c @@ -0,0 +1,16 @@ +/* + * Copyright (c) 2025, Ian Moffett. + * Provided under the BSD-3 clause. + */ + +#include +#include + +/* Forward declaration */ +void trap_dispatch(TRAPFRAME *tf); + +void +trap_dispatch(TRAPFRAME *tf) +{ + panic("fatal vector %x\n", tf->vector); +} diff --git a/mos/sys/arch/x86_64/cpu/vector.S b/mos/sys/arch/x86_64/cpu/vector.S new file mode 100644 index 0000000..6d29afb --- /dev/null +++ b/mos/sys/arch/x86_64/cpu/vector.S @@ -0,0 +1,214 @@ +/* + * Copyright (c) 2025, Ian Moffett. + * Provided under the BSD-3 clause. + */ + +#include +#include + + .macro set_trap vector, isr, ist + mov $\vector, %rdi + lea \isr(%rip), %rsi + mov $IDT_TRAP_GATE, %rdx + mov $\ist, %rcx + call md_idt_set_entry + .endm + + .macro push_trapframe vector + .if \vector == 10 || \vector == 11 || \vector == 12 || \vector == 13 \ + || \vector == 14 + subq $8, %rsp + .endif + + push %rax + push %rbx + push %rcx + push %rdx + push %rsi + push %rdi + push %rbp + push %r8 + push %r9 + push %r10 + push %r11 + push %r12 + push %r13 + push %r14 + push %r15 + push $\vector + .endm + + .text + .globl md_set_vectors +md_set_vectors: + push %r12 + push %r13 + push %r14 + push %r15 + push %rbx + push %rbp + + set_trap 0x00, diverr, 0 + set_trap 0x01, debug_except, 0 + set_trap 0x02, nmi, 0 + set_trap 0x03, breakpoint, 0 + set_trap 0x04, overflow, 0 + set_trap 0x05, bound_range, 0 + set_trap 0x06, invalid_tss, 0 + set_trap 0x07, no_coproc, 0 + set_trap 0x08, double_fault, 0 + set_trap 0x0A, invalid_tss, 0 + set_trap 0x0B, seg_np, 0 + set_trap 0x0C, ss_fault, 0 + set_trap 0x0D, gpf, 0 + set_trap 0x0E, page_fault, 0 + + pop %rbp + pop %rbx + pop %r15 + pop %r14 + pop %r13 + pop %r12 + retq + + .align 8 +diverr: + KFENCE + push_trapframe 0x00 + mov %rsp, %rdi + call trap_dispatch + KFENCE +1: cli + hlt + jmp 1b + +debug_except: + KFENCE + push_trapframe 0x1 + mov %rsp, %rdi + call trap_dispatch + KFENCE +1: cli + hlt + jmp 1b + +nmi: + KFENCE + push_trapframe 0x2 + mov %rsp, %rdi + call trap_dispatch + KFENCE +1: cli + hlt + jmp 1b + +breakpoint: + KFENCE + push_trapframe 0x3 + mov %rsp, %rdi + call trap_dispatch + KFENCE +1: cli + hlt + jmp 1b + +overflow: + KFENCE + push_trapframe 0x4 + mov %rsp, %rdi + call trap_dispatch + KFENCE +1: cli + hlt + jmp 1b + +bound_range: + KFENCE + push_trapframe 0x5 + mov %rsp, %rdi + call trap_dispatch + KFENCE +1: cli + hlt + jmp 1b + +invl_opc: + KFENCE + push_trapframe 0x6 + mov %rsp, %rdi + call trap_dispatch + KFENCE +1: cli + hlt + jmp 1b + +no_coproc: + KFENCE + push_trapframe 0x7 + mov %rsp, %rdi + call trap_dispatch + KFENCE +1: cli + hlt + jmp 1b + +double_fault: + KFENCE_EC + push_trapframe 0x8 + mov %rsp, %rdi + call trap_dispatch + KFENCE_EC +1: cli + hlt + jmp 1b + +invalid_tss: + KFENCE_EC + push_trapframe 0xA + mov %rsp, %rdi + call trap_dispatch + KFENCE_EC +1: cli + hlt + jmp 1b + +seg_np: + KFENCE_EC + push_trapframe 0xB + mov %rsp, %rdi + call trap_dispatch + KFENCE_EC +1: cli + hlt + jmp 1b + +ss_fault: + KFENCE_EC + push_trapframe 0xC + mov %rsp, %rdi + call trap_dispatch + KFENCE_EC +1: cli + hlt + jmp 1b + +gpf: + KFENCE_EC + push_trapframe 0xD + mov %rsp, %rdi + call trap_dispatch + KFENCE_EC +1: cli + hlt + jmp 1b + +page_fault: + KFENCE_EC + push_trapframe 0xE + mov %rsp, %rdi + call trap_dispatch + KFENCE_EC +1: cli + hlt + jmp 1b + hlt diff --git a/mos/sys/inc/arch/x86_64/frame.h b/mos/sys/inc/arch/x86_64/frame.h new file mode 100644 index 0000000..5908d93 --- /dev/null +++ b/mos/sys/inc/arch/x86_64/frame.h @@ -0,0 +1,40 @@ +/* + * Copyright (c) 2025, Ian Moffett. + * Provided under the BSD-3 clause. + */ + +#ifndef _MACHINE_FRAME_H_ +#define _MACHINE_FRAME_H_ 1 + +#include +#include + +/* + * Processor state + */ +typedef struct { + UQUAD vector; + UQUAD r15; + UQUAD r14; + UQUAD r13; + UQUAD r12; + UQUAD r11; + UQUAD r10; + UQUAD r9; + UQUAD r8; + UQUAD rbp; + UQUAD rdi; + UQUAD rsi; + UQUAD rbx; + UQUAD rdx; + UQUAD rcx; + UQUAD rax; + UQUAD error_code; + UQUAD rip; + UQUAD cs; + UQUAD rflags; + UQUAD rsp; + UQUAD ss; +} PACKED TRAPFRAME; + +#endif /* !_MACHINE_FRAME_H_ */ diff --git a/mos/sys/inc/arch/x86_64/kfence.h b/mos/sys/inc/arch/x86_64/kfence.h new file mode 100644 index 0000000..f44336c --- /dev/null +++ b/mos/sys/inc/arch/x86_64/kfence.h @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2025, Ian Moffett. + * Provided under the BSD-3 clause. + */ + +#ifndef _MACHINE_KFENCE_H_ +#define _MACHINE_KFENCE_H_ 1 + +/* + * Kernel fence for interrupt entries that do + * not have an error code + */ +#define KFENCE \ + testq $0x3, 8(%rsp) ; \ + jz 1f ; \ + lfence ; \ + swapgs ; \ +1: nop + +/* + * Kernel fence for interrupt entries that + * have an error code + */ +#define KFENCE_EC \ + testq $0x3, 16(%rsp) ; \ + jz 1f ; \ + lfence ; \ + swapgs ; \ +1: nop + +#endif /* !_MACHINE_KFENCE_H_ */ -- cgit v1.2.3